Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SSOP
Pin Count
24
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
3.6 ns@ 5 V
Maximum Operating Temperature
+125 °C
Length
8.4mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
5.4mm
Minimum Operating Supply Voltage
1.5 V
Propagation Delay Test Condition
50pF
Dimensions
8.4 x 5.4 x 1.8mm
Minimum Operating Temperature
-40 °C
Height
1.8mm
Country of Origin
Thailand
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SSOP
Pin Count
24
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
3.6 ns@ 5 V
Maximum Operating Temperature
+125 °C
Length
8.4mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
5.4mm
Minimum Operating Supply Voltage
1.5 V
Propagation Delay Test Condition
50pF
Dimensions
8.4 x 5.4 x 1.8mm
Minimum Operating Temperature
-40 °C
Height
1.8mm
Country of Origin
Thailand
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS