Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Monostable Multivibrator
Number of Elements per Chip
1
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Pulse Width
2.5 ns
Maximum Quiescent Current
20µA
Mounting Type
Surface Mount
Package Type
SM
Pin Count
8
Dimensions
3.15 x 2.9 x 1.2mm
Height
1.2mm
Length
3.15mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Maximum Operating Supply Voltage
5.5 V
Width
2.9mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
AED 17.77
AED 1.184 Each (In a Pack of 15) (ex VAT)
AED 18.66
AED 1.243 Each (In a Pack of 15) (inc. VAT)
Standard
15
AED 17.77
AED 1.184 Each (In a Pack of 15) (ex VAT)
AED 18.66
AED 1.243 Each (In a Pack of 15) (inc. VAT)
Standard
15
Stock information temporarily unavailable.
Please check again later.
quantity | Unit price | Per Pack |
---|---|---|
15 - 60 | AED 1.184 | AED 17.77 |
75 - 135 | AED 1.133 | AED 17.00 |
150 - 360 | AED 1.082 | AED 16.22 |
375 - 735 | AED 1.03 | AED 15.45 |
750+ | AED 0.978 | AED 14.68 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Monostable Multivibrator
Number of Elements per Chip
1
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Pulse Width
2.5 ns
Maximum Quiescent Current
20µA
Mounting Type
Surface Mount
Package Type
SM
Pin Count
8
Dimensions
3.15 x 2.9 x 1.2mm
Height
1.2mm
Length
3.15mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Maximum Operating Supply Voltage
5.5 V
Width
2.9mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22