Technical Document
Specifications
Brand
NexperiaLogic Function
OR
Mounting Type
Surface Mount
Number Of Elements
2
Number of Inputs per Gate
2
Package Type
TSSOP
Pin Count
8
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
0.95mm
Width
3.1mm
Minimum Operating Temperature
-40 °C
Dimensions
3.1 x 3.1 x 0.95mm
Output Type
Single Ended
Propagation Delay Test Condition
50pF
Length
3.1mm
Maximum Operating Temperature
+125 °C
Country of Origin
Thailand
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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AED 0.85
Each (On a Reel of 3000) (ex VAT)
AED 0.892
Each (On a Reel of 3000) (inc. VAT)
3000
AED 0.85
Each (On a Reel of 3000) (ex VAT)
AED 0.892
Each (On a Reel of 3000) (inc. VAT)
3000
Technical Document
Specifications
Brand
NexperiaLogic Function
OR
Mounting Type
Surface Mount
Number Of Elements
2
Number of Inputs per Gate
2
Package Type
TSSOP
Pin Count
8
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
0.95mm
Width
3.1mm
Minimum Operating Temperature
-40 °C
Dimensions
3.1 x 3.1 x 0.95mm
Output Type
Single Ended
Propagation Delay Test Condition
50pF
Length
3.1mm
Maximum Operating Temperature
+125 °C
Country of Origin
Thailand
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS