Technical Documents
Specifications
Brand
Renesas ElectronicsProduct Type
Buffer
Logic Family
CMOS
Logic Function
Buffer, Driver
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Buffered
Mount Type
Surface
Minimum Supply Voltage
2.3V
Package Type
MSOP
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Length
7.8mm
Height
1.2mm
Standards/Approvals
RoHS
Series
ISL33002
Supply Current
4mA
Automotive Standard
No
Product Details
The Renesas Electronics buffers are 2 channel bus buffers that provide the buffering necessary to extend the bus capacitance beyond the 400pF maximum specified by the I2C specification. It consist of rise time accelerator circuitry to reduce power consumption from passive bus pull-up resistors and improve data-rate performance.
Stock information temporarily unavailable.
AED 350.42
AED 7.008 Each (In a Tube of 50) (ex VAT)
AED 367.94
AED 7.358 Each (In a Tube of 50) (inc. VAT)
50
AED 350.42
AED 7.008 Each (In a Tube of 50) (ex VAT)
AED 367.94
AED 7.358 Each (In a Tube of 50) (inc. VAT)
Stock information temporarily unavailable.
50
| Quantity | Unit price | Per Tube |
|---|---|---|
| 50 - 50 | AED 7.008 | AED 350.42 |
| 100 - 200 | AED 5.938 | AED 296.92 |
| 250 - 450 | AED 5.564 | AED 278.20 |
| 500 - 950 | AED 5.136 | AED 256.80 |
| 1000+ | AED 4.976 | AED 248.78 |
Technical Documents
Specifications
Brand
Renesas ElectronicsProduct Type
Buffer
Logic Family
CMOS
Logic Function
Buffer, Driver
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Buffered
Mount Type
Surface
Minimum Supply Voltage
2.3V
Package Type
MSOP
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Length
7.8mm
Height
1.2mm
Standards/Approvals
RoHS
Series
ISL33002
Supply Current
4mA
Automotive Standard
No
Product Details
The Renesas Electronics buffers are 2 channel bus buffers that provide the buffering necessary to extend the bus capacitance beyond the 400pF maximum specified by the I2C specification. It consist of rise time accelerator circuitry to reduce power consumption from passive bus pull-up resistors and improve data-rate performance.