Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-23
Pin Count
5
Logic Family
LVC
Input Type
CMOS, TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4.3 ns @ 5 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+125 °C
Output Type
CMOS
Length
3.05mm
Height
1.3mm
Width
1.75mm
Minimum Operating Temperature
-40 °C
Dimensions
3.05 x 1.75 x 1.3mm
Propagation Delay Test Condition
50pF
Product details
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
AED 7.88
AED 0.315 Each (In a Pack of 25) (ex VAT)
AED 8.27
AED 0.331 Each (In a Pack of 25) (inc. VAT)
Standard
25
AED 7.88
AED 0.315 Each (In a Pack of 25) (ex VAT)
AED 8.27
AED 0.331 Each (In a Pack of 25) (inc. VAT)
Stock information temporarily unavailable.
Standard
25
Stock information temporarily unavailable.
| Quantity | Unit price | Per Pack |
|---|---|---|
| 25 - 100 | AED 0.315 | AED 7.88 |
| 125 - 225 | AED 0.21 | AED 5.25 |
| 250 - 600 | AED 0.158 | AED 3.94 |
| 625 - 1225 | AED 0.158 | AED 3.94 |
| 1250+ | AED 0.158 | AED 3.94 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-23
Pin Count
5
Logic Family
LVC
Input Type
CMOS, TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4.3 ns @ 5 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+125 °C
Output Type
CMOS
Length
3.05mm
Height
1.3mm
Width
1.75mm
Minimum Operating Temperature
-40 °C
Dimensions
3.05 x 1.75 x 1.3mm
Propagation Delay Test Condition
50pF
Product details
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22


